Many integrated circuit devices employ memory devices to store data. The memory devices are typically composed of bit cells, with each bit cell storing a bit of data. In order to read the value of data stored at a bit cell, a signal generated by the bit cell in response to a read voltage is compared at a sense amplifier to a reference signal provided by a reference device. The signal from the bit cell is generated by applying the read voltage to a gate electrode of a bit cell transistor to generate a current that represents a logic state. However, the signal level from the bit cell associated with a particular logic state can vary based on operating and process characteristics of the integrated circuit device. For example, the signal level associated with a high logic state can change based on the temperature or other operating characteristic of the integrated circuit device. Accordingly, it is sometimes desirable to design the reference device so that the reference signal tracks the operating characteristics of the associated bit cell with respect to temperature and voltage. For example, the reference device can include a transistor having similar characteristics as the bit cell transistor, allowing it to track the bit cell transistor. In addition, the reference device can be trimmed after formation of the integrated circuit device to ensure that the reference signal is at an appropriate level. By using a trimmable reference device that tracks the operating characteristics of the associated bit cell, the sense amplifier is able to appropriately read the state of the bit cell over a wider range of operating parameters.
The reference device may, however, be subject to disturb mechanisms that can adversely affect the reference signal level in response to a read voltage. For example, a floating gate bit cell is sometimes used as a reference device. In some cases, a disturb mechanism can cause the floating gate bit cell to program or clear, leading to an undesirable shift in its voltage threshold and leading to errors in reading memory bit cells. Accordingly, an improved device for providing a bit cell reference would be advantageous.